Low Power Unrolled CORDIC Architectures

Research output: Contribution to conferencePaper, not in proceeding


This paper shows a novel methodology to improve unrolled CORDIC architectures. The methodology is based on removing adder stages starting from the first stage. As an example, a 19-stage CORDIC is used but the methodology is applicable on CORDICs with an arbitrary number of stages. The CORDIC is implemented, simulated, and synthesized into hardware. In the paper, the performance is shown to be increased by 23% and that the dynamic power can be reduced by 27%.


  • Peter Nilsson
  • Yuhang Sun
  • Rakesh Gangarajaiah
  • Erik Hertz
Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Other Electrical Engineering, Electronic Engineering, Information Engineering
Original languageEnglish
Number of pages4
Publication statusPublished - 2015
Publication categoryResearch
EventNORSIG 2015 - Oslo
Duration: 2015 Oct 26 → …


ConferenceNORSIG 2015
Period2015/10/26 → …