Scaling of Vertical InAs–GaSb Nanowire Tunneling Field-Effect Transistors on Si

Research output: Contribution to journalLetter


We demonstrate improved performance due to enhanced electrostatic control achieved by diameter scaling and gate placement in vertical InAs-GaSb tunneling field-effect transistors integrated on Si substrates. The best subthreshold swing, 68 mV/decade at VDS=0.3 V, was achieved for a device with 20-nm InAs diamter. The on-current for the same device was 35 µA/µm at VGS=0.5 V and VDS=0.5 V. The fabrication technique used allows downscaling of the InAs diameter down to 11 nm with a flexible gate placement.


Research areas and keywords

Subject classification (UKÄ) – MANDATORY

  • Electrical Engineering, Electronic Engineering, Information Engineering


  • HSQ, nanowire, III-V, TFET, transistor, InAs-GaSb
Original languageEnglish
Pages (from-to) 549 - 552
JournalIEEE Electron Device Letters
Issue number5
Publication statusPublished - 2016 May 5
Publication categoryResearch

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