Analog Integrated Circuits and Signal Processing, 0925-1030

Tidskrift

Fler filtreringsmöjligheter
  1. 2019
  2. A high precision logarithmic-curvature compensated all CMOS voltage reference

    Tayebeh Ghanavati Nejad, Ebrahim Farshidi, Henrik Sjöland & Abdolnabi Kosarian, 2019, I : Analog Integrated Circuits and Signal Processing. 99, 2, s. 383-392

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  3. 2017
  4. System simulations of a 1.5 V SiGe 81-86 GHz E-band transmitter

    TOBIAS TIRED, Per Sandrup, Anders Nejdel, Johan Wernehag & Henrik Sjöland, 2017 feb, I : Analog Integrated Circuits and Signal Processing. 90, 2, s. 333-349 17 s.

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  5. 2016
  6. A continuous-time delta-sigma ADC with integrated digital background calibration

    Siyu Tan, Yun Miao, Mattias Palm, Joachim Neves Rodrigues & Pietro Andreani, 2016 nov 1, I : Analog Integrated Circuits and Signal Processing. 89, 2, s. 273-282 10 s.

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  7. A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications

    Ahmed Mahmoud, Pietro Andreani & Ping Lu, 2016 nov, I : Analog Integrated Circuits and Signal Processing. 89, 2, s. 337-345 9 s.

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  8. A 2.8-to-5.8 GHz harmonic VCO based on an 8-shaped inductor in a 28 nm UTBB FD-SOI CMOS process

    Ahmed Mahmoud, Luca Fanori, Thomas Mattsson, Peter Caputa & Piero Andreani, 2016 maj 23, I : Analog Integrated Circuits and Signal Processing. 88, 3, s. 391-399 9 s.

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  9. 2015
  10. A 28 GHz SiGe PLL for an 81-86 GHz E-band beam steering transmitter plus an I/Q phase imbalance detection and compensation circuit

    Tobias Tired, Henrik Sjöland, Per Sandrup, Johan Wernehag, Imad ud Din & Markus Törmänen, 2015, I : Analog Integrated Circuits and Signal Processing. 84, 3, s. 383-398

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  11. A low-power 2nd-order CT delta-sigma modulator with an asynchronous SAR quantizer

    Dejan Radjen, Martin Anderson, Lars Sundstrom & Pietro Andreani, 2015, I : Analog Integrated Circuits and Signal Processing. 84, 3, s. 409-420

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  12. 2014
  13. A 1V power amplifier for 81-86 GHz E-band

    Tobias Tired, Henrik Sjöland, Carl Bryant & Markus Törmänen, 2014, I : Analog Integrated Circuits and Signal Processing. 80, 3, s. 335-348

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  14. A 60 GHz receiver front-end with PLL based phase controlled LO generation for phased-arrays

    Andreas Axholt & Henrik Sjöland, 2014, I : Analog Integrated Circuits and Signal Processing. 80, 1, s. 23-32

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  15. A low-power 2nd-order CT delta-sigma modulator with a single operational amplifier

    Dejan Radjen, Martin Anderson, Lars Sundstrom & Pietro Andreani, 2014, I : Analog Integrated Circuits and Signal Processing. 80, 3, s. 387-397

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  16. 2013
  17. A 2.7-6.1 GHz CMOS local oscillator based on frequency multiplication by 3/2

    Andrea Bevilacqua & Pietro Andreani, 2013, I : Analog Integrated Circuits and Signal Processing. 74, 1, s. 11-20

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  18. A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency

    Ping Lu, Pietro Andreani & Antonio Liscidini, 2013, I : Analog Integrated Circuits and Signal Processing. 76, 2, s. 195-206

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  19. Introduction to the Special Issue on 29th NORCHIP Conference

    Henrik Sjöland, 2013, I : Analog Integrated Circuits and Signal Processing. 74, 1, s. 1-2

    Forskningsoutput: TidskriftsbidragDebate/Note/Editorial

  20. Theory and Design of a CT Delta Sigma Modulator with Low Sensitivity to Loop-Delay Variations

    Mattias Andersson, Lars Sundström, Martin Andersson & Pietro Andreani, 2013, I : Analog Integrated Circuits and Signal Processing. 76, 3, s. 353-366

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  21. Tunable wideband SAW-less receiver front-end in 65 nm CMOS

    Imad ud Din, Johan Wernehag, Stefan Andersson, Henrik Sjöland & Sven Mattisson, 2013, I : Analog Integrated Circuits and Signal Processing. 77, 1, s. 3-16

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  22. 2012
  23. A Continuous Time Delta-Sigma Modulator with Reduced Clock Jitter Sensitivity through DSCR Feedback

    Dejan Radjen, Martin Andersson, Lars Sundström & Pietro Andreani, 2012, I : Analog Integrated Circuits and Signal Processing.

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  24. 2011
  25. A BiCMOS single ended multiband RF-amplifier and mixer with DC-offset and second order distortion suppression

    TOBIAS TIRED, 2011 sep 1, I : Analog Integrated Circuits and Signal Processing. 68, 3, s. 269-283 15 s.

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  26. A 5GHz 90-nm CMOS all digital phase-locked loop

    Ping Lu & Henrik Sjöland, 2011, I : Analog Integrated Circuits and Signal Processing. 66, 1, s. 49-59

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  27. A PLL based 12 GHz LO generator with digital phase control in 90 nm CMOS

    Andreas Axholt & Henrik Sjöland, 2011, I : Analog Integrated Circuits and Signal Processing. 67, 3, s. 309-318

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  28. Design and analysis of an ultra-low-power LC quadrature VCO

    Kin Keung Lee, Carl Bryant, Markus Törmänen & Henrik Sjöland, 2011, I : Analog Integrated Circuits and Signal Processing. 67, s. 49-60

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  29. Time-variant analysis and design of a power efficient ISM-band quadrature receiver

    Matteo Camponeschi, Andrea Bevilacqua & Pietro Andreani, 2011, I : Analog Integrated Circuits and Signal Processing. 67, 1, s. 11-20

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  30. 2010
  31. A technique for improving gain and noise figure of common-gate wideband LNAs

    Gholamreza Zare Fatin, Z.D. Koozehkanani & Henrik Sjöland, 2010, I : Analog Integrated Circuits and Signal Processing. 65, 2, s. 239-244

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  32. 2009
  33. Analysis of a high frequency and wide bandwidth active polyphase filter based on CMOS inverters

    Johan Wernehag & Henrik Sjöland, 2009, I : Analog Integrated Circuits and Signal Processing. 59, 3, s. 243-255

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  34. 2007
  35. A polyphase filter based on CMOS inverters

    Fredrik Tillman & Henrik Sjöland, 2007, I : Analog Integrated Circuits and Signal Processing. 50, 1, s. 7-12

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  36. A toroidal inductor integrated in a standard CMOS process

    Luca Vandi, Pietro Andreani, Enrico Temporiti, Enrico Sacchi, Ivan Bietti, Cesare Ghezzi & Rinaldo Castello, 2007, I : Analog Integrated Circuits and Signal Processing. 50, 1, s. 39-46

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  37. Characterization of CMOS Impedance Tuning Unit

    Peter Sjöblom & Henrik Sjöland, 2007, I : Analog Integrated Circuits and Signal Processing. 52, 3, s. 79-87

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  38. Linearity of bulk-controlled inverter ring VCO in weak and strong inversion

    Ulrik Wismar, Dag Wisland & Pietro Andreani, 2007, I : Analog Integrated Circuits and Signal Processing. 50, 1, s. 59-67

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  39. 2006
  40. An ultra low voltage, low power, fully integrated VCO for GPS in 90 nm RF-CMOS

    Lars Aspemyr & D Linten, 2006, I : Analog Integrated Circuits and Signal Processing. 46, 1, s. 57-63

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  41. Full oscillation cycle phase noise analysis of differential CMOS LC oscillators

    Niklas Troedsson & Henrik Sjöland, 2006, I : Analog Integrated Circuits and Signal Processing. 48, 3, s. 211-222

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  42. 2005
  43. A distributed capacitance analysis of co-planar inductors for a CMOS QVCO with varactor tuned buffer stage

    Niklas Troedsson & Henrik Sjöland, 2005, I : Analog Integrated Circuits and Signal Processing. 42, 1, s. 7-19

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  44. Reduced impact of induced gate noise on inductively degenerated LNAs in deep submicron CMOS technologies

    Paolo Rossi, Francesco Svelto, Andrea Mazzanti & Pietro Andreani, 2005, I : Analog Integrated Circuits and Signal Processing. 42, 1, s. 31-36

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  45. 2004
  46. A single-stage direct interpolation multiphase clock generator with phase error averaging

    Yang Lixin & Jiren Yuan, 2004, I : Analog Integrated Circuits and Signal Processing. 38, 1, s. 17-26

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  47. 2002
  48. A voltage-translinear based CMOS signal component separator chip for linear LINC transmitters

    B Shi & Lars Sundström, 2002, I : Analog Integrated Circuits and Signal Processing. 30, 1, s. 31-39

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  49. 2000
  50. A 2.4-GHz CMOS monolithic VCO with an MOS varactor

    Pietro Andreani & Sven Mattisson, 2000, I : Analog Integrated Circuits and Signal Processing. 22, 1, s. 17-24

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  51. A chip for linearization of RF power amplifiers using predistortion based on a bit-parallel complex multiplier

    Pietro Andreani & Lars Sundström, 2000, I : Analog Integrated Circuits and Signal Processing. 22, 1, s. 25-30

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  52. 1999
  53. A digitally controlled shunt capacitor CMOS delay line

    Pietro Andreani, Franco Bigongiari, Roberto Roncella, Roberto Saletti & Pierangelo Terreni, 1999, I : Analog Integrated Circuits and Signal Processing. 18, 1, s. 89-96

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  54. An inductorless 300MHz wideband CMOS power amplifier

    Henrik Sjöland, 1999, I : Analog Integrated Circuits and Signal Processing. 21, 1, s. 57-65

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  55. Power Reduction in Custom CMOS Digital Filter Structures

    Pontus Åström, Peter Nilsson & Mats Torkelson, 1999, I : Analog Integrated Circuits and Signal Processing. 18, 1, s. 97-105

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift

  56. 1997
  57. A novel class AB CMOS power amplifier

    Henrik Sjöland & Sven Mattisson, 1997, I : Analog Integrated Circuits and Signal Processing. 12, 1, s. 49-58

    Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskrift