A 0.2V 0.44 uW 20 kHz Analog to Digital Sigma-Delta Modulator with 57 fJ/conversion FoM

Forskningsoutput: Kapitel i bok/rapport/Conference proceedingKonferenspaper i proceeding

Abstract

This paper presents a 90 nm CMOS A/D modulator operating with a supply voltage of 0.2 V, well below the threshold voltage of the transistors. The modulator is an open-loop first-order architecture based on a frequency-modulated intermediate signal, generated in a ring voltage-controlled oscillator. The linearity of the modulator is greatly improved by the adoption of a so-called soft-rail in the oscillator. Measurements show a dynamic range of 52 dB over a 20 kHz signal bandwidth with a sampling frequency of 3.4 MHz, for a total power consumption as low as 0.44 muW. The corresponding peak SNDR is 44.2 dB, while the peak SNR is 47.4 dB

Detaljer

Författare
Externa organisationer
  • External Organization - Unknown
Forskningsområden

Ämnesklassifikation (UKÄ) – OBLIGATORISK

  • Elektroteknik och elektronik
Originalspråkengelska
Titel på värdpublikationProceedings of the 32nd European Solid-State Circuits Conference, 2006. ESSCIRC 2006.
Sidor187-190
StatusPublished - 2006
PublikationskategoriForskning
Peer review utfördJa
Externt publiceradJa

Publikationsserier

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ISSN (tryckt)1930-8833