A non-feedback multiphase clock generator using direct interpolation

Forskningsoutput: Kapitel i bok/rapport/Conference proceedingKonferenspaper i proceeding

Abstract

This paper presents a new multiphase clock generator using direct interpolators. No feedback loop is required. A single-stage direct interpolation architecture is proposed. A 1/4 frequency divider and a short-circuit current suppression interpolator are developed to achieve the precise interpolation. The circuit was fabricated in a standard 0.35μm, 3.3V CMOS process. The multiphase clock generator can operate in a wide range of input clock frequencies from 500 MHz to 1 GHz.

Detaljer

Författare
  • Yang Lixin
  • Zhou Yijun
  • Jiren Yuan
Enheter & grupper
Forskningsområden

Ämnesklassifikation (UKÄ) – OBLIGATORISK

  • Elektroteknik och elektronik

Nyckelord

Originalspråkengelska
Titel på värdpublikation2002 45th Midwest Symposium on Circuits and Systems, vol 1, Conference Proceedings
FörlagIEEE - Institute of Electrical and Electronics Engineers Inc.
Sidor340-343
Volym1
ISBN (tryckt)0-7803-7523-8
StatusPublished - 2002
PublikationskategoriForskning
Peer review utfördJa
Evenemang2002 45th Midwest Symposium on Circuits and Systems - Tulsa, OK, USA
Varaktighet: 2002 aug 42002 aug 7

Publikationsserier

Namn
Volym1

Konferens

Konferens2002 45th Midwest Symposium on Circuits and Systems
LandUSA
OrtTulsa, OK
Period2002/08/042002/08/07