A sequential logic device realized by integration of in-plane gate transistors in InGaAs/InP

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Abstract

An integrated nanoelectronic circuit is fabricated from a high-mobility In0.75Ga0.25As/InP heterostructure. The manufactured device comprises two double in-plane gate transistors with a current channel of 1.1 mu m in length and 100 nm in width. The two transistors are coupled to each other in a configuration that the source of one transistor is directly connected with one in-plane gate of the other transistor. Electrical measurements reveal that this device functions as an SR (set-reset) latch (a sequential logic device) with a gain of similar to 4 in the logic swing at room temperature. The demonstrated device provides a simple circuit design for SR latches.

Detaljer

Författare
  • Jie Sun
  • Daniel Wallin
  • Yuhui He
  • Ivan Maximov
  • Hongqi Xu
Enheter & grupper
Forskningsområden

Ämnesklassifikation (UKÄ) – OBLIGATORISK

  • Den kondenserade materiens fysik
Originalspråkengelska
Artikelnummer012116
TidskriftApplied Physics Letters
Volym92
Utgåva nummer1
StatusPublished - 2008
PublikationskategoriForskning
Peer review utfördJa