Capacitance Measurements in Vertical III-V Nanowire TFETs

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Bibtex

@article{685b0f9c09e14fba8ffa241997e52eaa,
title = "Capacitance Measurements in Vertical III-V Nanowire TFETs",
abstract = "By measuring scattering parameters over a wide range of bias points, we study the intrinsic gate capacitance as well as the charge partitioning of vertical nanowire tunnel field-effect transistors (TFETs). The gate-to-drain capacitance Cgd is found to largely dominate the on-state of TFETs, whereas the gate-to-source capacitance Cgs is sufficiently small to be completely dominated by parasitic components. This indicates that the tunnel junction on the source side almost completely decouples the channel charge from the small-signal variation in the source, while the absence of a tunnel junction on the drain side allows the channel charge to follow the drain small-signal variation much more directly.",
keywords = "Vertical Nanowires, III-V, TFET, Small-signal model, Intrinsic Capacitance, RF, Cgd, Cgs",
author = "Markus Hellenbrand and Elvedin Memisevic and Johannes Svensson and Abinaya Krishnaraja and Erik Lind and Lars-Erik Wernersson",
year = "2018",
month = "5",
day = "4",
doi = "10.1109/LED.2018.2833168",
language = "English",
volume = "39",
pages = "943--946",
journal = "IEEE Electron Device Letters",
issn = "0741-3106",
publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",
number = "7",

}