III-V nanowire MOSFETs with novel self-limiting Λ-ridge spacers for RF applications

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Abstract

We present a semi self-aligned processing scheme for III-V nanowire transistors with novel semiconductor spacers in the shape of Λ-ridges, utilising the effect of slow growth rate on {111}B facets. The addition of spacers relaxes the constraint on the perfect alignment of gate to contact areas to enable low overlap capacitances. The spacers give a field-plate effect that also helps reduce off-state and output conductance while increasing breakdown voltage. Microwave compatible devices with L g = 32 nm showing f T = 75 GHz and f max = 100 GHz are realized with the process, demonstrating matched performance to spacer-less devices but with relaxed scaling requirements.

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Nyckelord

Originalspråkengelska
Artikelnummer065015
TidskriftSemiconductor Science and Technology
Volym35
Utgåva nummer6
StatusPublished - 2020 jun 1
PublikationskategoriForskning
Peer review utfördJa