A 2.45GHz, 50uW wake-up receiver front-end with -88dBm sensitivity and 250kbps data rate

Carl Bryant; Henrik Sjöland

doi:10.1109/ESSCIRC.2014.6942065

A 2.45GHz, 50uW wake-up receiver front-end with -88dBm sensitivity and 250kbps data rate

Carl Bryant, Henrik Sjöland

Forskningsoutput: Kapitel i bok/rapport/Conference proceeding › Konferenspaper i proceeding › Peer review

29 Citeringar (SciVal)

Sammanfattning

This paper presents a 2.45 GHz wake-up receiver front-end intended for use in sensor networks, and is designed to receive data modulated with on-off-keying. Manufactured in 65 nm CMOS it employs an uncertain IF structure with three phase passive mixer and high gain amplifier chain. With the modulation frequency response tailored to the detector behaviour, it achieves a sensitivity of -88 dBm at BER of 10e-3 with a
data rate of 250kbps. Operating on a 0.75V supply it has a power consumption of just 50uW. It provides a 50Ohm input match completely on-chip using a compact inductor and has an active area of just 0.07mm2.

Originalspråk	engelska
Titel på värdpublikation	[Host publication title missing]
Förlag	IEEE - Institute of Electrical and Electronics Engineers Inc.
Sidor	235-238
Antal sidor	4
ISBN (tryckt)	978-1-4799-5694-4
DOI	https://doi.org/10.1109/ESSCIRC.2014.6942065
Status	Published - 2014
Evenemang	European Solid State Circuits Conference (ESSCIRC), 2014 - Venezia Lido, ITALY, Venice, Italien Varaktighet: 2014 sep. 22 → 2014 sep. 26 Konferensnummer: 40

Publikationsserier

Namn
ISSN (tryckt)	1930-8833

Konferens

Konferens	European Solid State Circuits Conference (ESSCIRC), 2014
Land/Territorium	Italien
Ort	Venice
Period	2014/09/22 → 2014/09/26

Ämnesklassifikation (UKÄ)

Elektroteknik och elektronik

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10.1109/ESSCIRC.2014.6942065

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title = "A 2.45GHz, 50uW wake-up receiver front-end with -88dBm sensitivity and 250kbps data rate",

abstract = "This paper presents a 2.45 GHz wake-up receiver front-end intended for use in sensor networks, and is designed to receive data modulated with on-off-keying. Manufactured in 65 nm CMOS it employs an uncertain IF structure with three phase passive mixer and high gain amplifier chain. With the modulation frequency response tailored to the detector behaviour, it achieves a sensitivity of -88 dBm at BER of 10e-3 with a data rate of 250kbps. Operating on a 0.75V supply it has a power consumption of just 50uW. It provides a 50Ohm input match completely on-chip using a compact inductor and has an active area of just 0.07mm2.",

author = "Carl Bryant and Henrik Sj{\"o}land",

year = "2014",

doi = "10.1109/ESSCIRC.2014.6942065",

language = "English",

isbn = "978-1-4799-5694-4",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

pages = "235--238",

booktitle = "[Host publication title missing]",

address = "United States",

note = "European Solid State Circuits Conference (ESSCIRC), 2014 ; Conference date: 22-09-2014 Through 26-09-2014",

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T1 - A 2.45GHz, 50uW wake-up receiver front-end with -88dBm sensitivity and 250kbps data rate

AU - Bryant, Carl

AU - Sjöland, Henrik

N1 - Conference code: 40

PY - 2014

Y1 - 2014

N2 - This paper presents a 2.45 GHz wake-up receiver front-end intended for use in sensor networks, and is designed to receive data modulated with on-off-keying. Manufactured in 65 nm CMOS it employs an uncertain IF structure with three phase passive mixer and high gain amplifier chain. With the modulation frequency response tailored to the detector behaviour, it achieves a sensitivity of -88 dBm at BER of 10e-3 with a data rate of 250kbps. Operating on a 0.75V supply it has a power consumption of just 50uW. It provides a 50Ohm input match completely on-chip using a compact inductor and has an active area of just 0.07mm2.

AB - This paper presents a 2.45 GHz wake-up receiver front-end intended for use in sensor networks, and is designed to receive data modulated with on-off-keying. Manufactured in 65 nm CMOS it employs an uncertain IF structure with three phase passive mixer and high gain amplifier chain. With the modulation frequency response tailored to the detector behaviour, it achieves a sensitivity of -88 dBm at BER of 10e-3 with a data rate of 250kbps. Operating on a 0.75V supply it has a power consumption of just 50uW. It provides a 50Ohm input match completely on-chip using a compact inductor and has an active area of just 0.07mm2.

U2 - 10.1109/ESSCIRC.2014.6942065

DO - 10.1109/ESSCIRC.2014.6942065

M3 - Paper in conference proceeding

SN - 978-1-4799-5694-4

SP - 235

EP - 238

BT - [Host publication title missing]

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - European Solid State Circuits Conference (ESSCIRC), 2014

Y2 - 22 September 2014 through 26 September 2014

ER -

A 2.45GHz, 50uW wake-up receiver front-end with -88dBm sensitivity and 250kbps data rate

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