A two-stage mm-wave PA with 18.5% PAE in 65 nm CMOS

Therese Forsberg; Henrik Sjöland; Markus Törmänen

doi:10.1109/APMC.2015.7411664

A two-stage mm-wave PA with 18.5% PAE in 65 nm CMOS

Therese Forsberg, Henrik Sjöland, Markus Törmänen

Forskningsoutput: Kapitel i bok/rapport/Conference proceeding › Konferenspaper i proceeding › Peer review

Sammanfattning

A two-stage mm-wave power amplifier (PA) is presented. Designed in a 65 nm CMOS process, the PA employs capacitive neutralization in each stage for increased differential isolation and gain. Baluns are used for single-ended input/output signal to balanced signal conversion, and the interstage matching consists of a 2:1 transformer. With a 1.2 V supply, at 67 GHz, measurements show a gain of 16.8 dB, a 1dB-compression point (P1dB) of 8.4 dBm and a saturated output power (Psat) of 11.8dBm, with a peak power added efficiency (PAE) of 18.5 %. The PA core occupies an area of 100 um x 300 um.

Originalspråk	engelska
Titel på värdpublikation	2015 Asia-Pacific Microwave Conference (APMC)
Sidor	1-3
Antal sidor	3
Volym	1
DOI	https://doi.org/10.1109/APMC.2015.7411664
Status	Published - 2015
Evenemang	2015 Asia-Pacific Microwave Conference (APMC) - Nanjing, Kina Varaktighet: 2015 dec. 6 → 2015 dec. 9

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Volym	1

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Konferens	2015 Asia-Pacific Microwave Conference (APMC)
Land/Territorium	Kina
Ort	Nanjing
Period	2015/12/06 → 2015/12/09

Ämnesklassifikation (UKÄ)

Elektroteknik och elektronik

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10.1109/APMC.2015.7411664

1 Doktorsavhandling (sammanläggning)

Efficient mm-Wave Transmitter Design in CMOS Technology
Bidragets översatta titel : Design av effektiva millimetervågssändare i CMOS-teknologiForsberg, T., 2018 nov. 18, Lund: The Department of Electrical and Information Technology. 136 s.
Forskningsoutput: Avhandling › Doktorsavhandling (sammanläggning)

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@inproceedings{c4355bf7c2a649a4b55819d2037ba443,

title = "A two-stage mm-wave PA with 18.5% PAE in 65 nm CMOS",

abstract = "A two-stage mm-wave power amplifier (PA) is presented. Designed in a 65 nm CMOS process, the PA employs capacitive neutralization in each stage for increased differential isolation and gain. Baluns are used for single-ended input/output signal to balanced signal conversion, and the interstage matching consists of a 2:1 transformer. With a 1.2 V supply, at 67 GHz, measurements show a gain of 16.8 dB, a 1dB-compression point (P1dB) of 8.4 dBm and a saturated output power (Psat) of 11.8dBm, with a peak power added efficiency (PAE) of 18.5 %. The PA core occupies an area of 100 um x 300 um.",

author = "Therese Forsberg and Henrik Sj{\"o}land and Markus T{\"o}rm{\"a}nen",

year = "2015",

doi = "10.1109/APMC.2015.7411664",

language = "English",

isbn = "978-1-4799-8765-8",

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note = "2015 Asia-Pacific Microwave Conference (APMC) ; Conference date: 06-12-2015 Through 09-12-2015",

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AU - Forsberg, Therese

AU - Sjöland, Henrik

AU - Törmänen, Markus

PY - 2015

Y1 - 2015

N2 - A two-stage mm-wave power amplifier (PA) is presented. Designed in a 65 nm CMOS process, the PA employs capacitive neutralization in each stage for increased differential isolation and gain. Baluns are used for single-ended input/output signal to balanced signal conversion, and the interstage matching consists of a 2:1 transformer. With a 1.2 V supply, at 67 GHz, measurements show a gain of 16.8 dB, a 1dB-compression point (P1dB) of 8.4 dBm and a saturated output power (Psat) of 11.8dBm, with a peak power added efficiency (PAE) of 18.5 %. The PA core occupies an area of 100 um x 300 um.

AB - A two-stage mm-wave power amplifier (PA) is presented. Designed in a 65 nm CMOS process, the PA employs capacitive neutralization in each stage for increased differential isolation and gain. Baluns are used for single-ended input/output signal to balanced signal conversion, and the interstage matching consists of a 2:1 transformer. With a 1.2 V supply, at 67 GHz, measurements show a gain of 16.8 dB, a 1dB-compression point (P1dB) of 8.4 dBm and a saturated output power (Psat) of 11.8dBm, with a peak power added efficiency (PAE) of 18.5 %. The PA core occupies an area of 100 um x 300 um.

U2 - 10.1109/APMC.2015.7411664

DO - 10.1109/APMC.2015.7411664

M3 - Paper in conference proceeding

SN - 978-1-4799-8765-8

VL - 1

SP - 1

EP - 3

BT - 2015 Asia-Pacific Microwave Conference (APMC)

T2 - 2015 Asia-Pacific Microwave Conference (APMC)

Y2 - 6 December 2015 through 9 December 2015

ER -

A two-stage mm-wave PA with 18.5% PAE in 65 nm CMOS

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Efficient mm-Wave Transmitter Design in CMOS Technology

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