Adaptive Baseband Pro cessing and Configurable Hardware for Wireless Communication

The world of information is literally at one’s fingertips, allowing access to previously unimaginable amounts of data, thanks to advances in wireless communication. The growing demand for high speed data has necessitated the
use of wider bandwidths, and wireless technologies such as Multiple-Input
Multiple-Output (MIMO) have been adopted to increase spectral efficiency.
These advanced communication technologies require sophisticated signal processing, often leading to higher power consumption and reduced battery life.
Therefore, increasing energy efficiency of baseband hardware for MIMO signal processing has become extremely vital. High Quality of Service (QoS)
requirements invariably lead to a larger number of computations and a higher
power dissipation. However, recognizing the dynamic nature of the wireless
communication medium in which only some channel scenarios require complex
signal processing, and that not all situations call for high data rates, allows
the use of an adaptive channel aware signal processing strategy to provide a
desired QoS. Information such as interference conditions, coherence bandwidth
and Signal to Noise Ratio (SNR) can be used to reduce algorithmic computations in favorable channels. Hardware circuits which run these algorithms
need flexibility and easy reconfigurability to switch between multiple designs
for different parameters. These parameters can be used to tune the operations of different components in a receiver based on feedback from the digital
baseband. This dissertation focuses on the optimization of digital baseband
circuitry of receivers which use feedback to trade power and performance. A
co-optimization approach, where designs are optimized starting from the algorithmic stage through the hardware architectural stage to the final circuit
implementation is adopted to realize energy efficient digital baseband hardware
for mobile 4G devices. These concepts are also extended to the next generation
5G systems where the energy efficiency of the base station is improved.
This work includes six papers that examine digital circuits in MIMO wireless receivers. Several key blocks in these receiver include analog circuits that
have residual non-linearities, leading to signal intermodulation and distortion.
Paper-I introduces a digital technique to detect such non-linearities and calibrate analog circuits to improve signal quality. The concept of a digital nonlinearity tuning system developed in Paper-I is implemented and demonstrated
in hardware. The performance of this implementation is tested with an analog
channel select filter, and results are presented in Paper-II. MIMO systems such
as the ones used in 4G, may employ QR Decomposition (QRD) processors to
simplify the implementation of tree search based signal detectors. However,
the small form factor of the mobile device increases spatial correlation, which
is detrimental to signal multiplexing. Consequently, a QRD processor capable
of handling high spatial correlation is presented in Paper-III. The algorithm and hardware implementation are optimized for carrier aggregation, which increases requirements on signal processing throughput, leading to higher power
dissipation. Paper-IV presents a method to perform channel-aware processing
with a simple interpolation strategy to adaptively reduce QRD computation
count. Channel properties such as coherence bandwidth and SNR are used to
reduce multiplications by 40% to 80%. These concepts are extended to use
time domain correlation properties, and a full QRD processor for 4G systems
fabricated in 28 nm FD-SOI technology is presented in Paper-V. The design
is implemented with a configurable architecture and measurements show that
circuit tuning results in a highly energy efficient processor, requiring 0.2 nJ to
1.3 nJ for each QRD. Finally, these adaptive channel-aware signal processing
concepts are examined in the scope of the next generation of communication
systems. Massive MIMO systems increase spectral efficiency by using a large
number of antennas at the base station. Consequently, the signal processing
at the base station has a high computational count. Paper-VI presents a configurable detection scheme which reduces this complexity by using techniques
such as selective user detection and interpolation based signal processing. Hardware is optimized for resource sharing, resulting in a highly reconfigurable and
energy efficient uplink signal detector.