@inproceedings{32c2ade94c91449ba11b87c093263ce3,
title = "An 11mW Continuous Time Delta-Sigma Modulator with 20 MHz Bandwidth in 65nm CMOS",
abstract = "This paper presents a multi-bit, continuous time delta-sigma modulator with 20 MHz bandwidth implemented in 65nm CMOS for cellular communication. The modulator features a third order, single loop filter and a 4-bit internal quantizer operating at 640 MHz. The DACs are resistive for lower thermal noise compared to the current-steering DACs and nonreturn-to-zero DAC pulse is used to reduce the clock jitter sensitivity. The measured prototype consumes 11mW from a 1.2 V power supply, and achieves an SNDR/SFDR of 63.5dB/76dB.",
author = "Xiaodong Liu and Mattias Andersson and Martin Anderson and Lars Sundstrom and Pietro Andreani",
year = "2014",
language = "English",
publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",
pages = "2337--2340",
booktitle = "2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)",
address = "United States",
note = "IEEE International Symposium on Circuits and Systems (ISCAS), 2014 ; Conference date: 01-06-2014 Through 05-06-2014",
}