Analysis and design of an 1-20 GHz track and hold circuit

Peng Chen, Stefan Andersson, Sten E. Gunnarsson, Henrik Sjöland

Forskningsoutput: Kapitel i bok/rapport/Conference proceedingKonferenspaper i proceedingPeer review

Sammanfattning

This work analyzes the nonlinear effects in the track and hold circuit applied in high-speed ADCs or RF sampling receiver (RX) front-ends. Non-ideal effects inside the main sampling NMOS switch are studied. Parasitic varactor and sampling on-resistance modulation effects are analyzed through frequency domain Volterra series and the EKV MOS transistor model. Polynomial curve fitting is applied showing that the on-resistance modulation dominates. Finally, a novel bootstrap circuit is proposed with a fast settling time and high bootstrap voltage in a 22 nm FD-SOI CMOS technology, with its settling time analyzed using the Elmore delay model.

Originalspråkengelska
Titel på värdpublikation2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
FörlagIEEE - Institute of Electrical and Electronics Engineers Inc.
ISBN (elektroniskt)9781728192017
DOI
StatusPublished - 2021
Evenemang53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Sydkorea, Republiken Korea
Varaktighet: 2021 maj 222021 maj 28

Publikationsserier

NamnProceedings - IEEE International Symposium on Circuits and Systems
Volym2021-May
ISSN (tryckt)0271-4310

Konferens

Konferens53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Land/TerritoriumSydkorea, Republiken Korea
OrtDaegu
Period2021/05/222021/05/28

Ämnesklassifikation (UKÄ)

  • Elektroteknik och elektronik

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