Sammanfattning
The objective of this paper is to design a compressor for silicon debug that is suitable in an industrial Nexus environment. The compressor must operate in real-time and must be lossless. Important for the compressor is high compression ratio, low hardware cost and high throughput. We implemented the compression on an FPGA and we compared our implementation in terms of throughput and hardware cost against other approaches.
Originalspråk | engelska |
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Titel på värdpublikation | Proceedings - 2016 21st IEEE European Test Symposium, ETS 2016 |
Förlag | IEEE - Institute of Electrical and Electronics Engineers Inc. |
ISBN (elektroniskt) | 9781467396592 |
DOI | |
Status | Published - 2016 juli 22 |
Evenemang | 21st IEEE European Test Symposium, ETS 2016 - Amsterdam, Nederländerna Varaktighet: 2016 maj 23 → 2016 maj 26 |
Konferens
Konferens | 21st IEEE European Test Symposium, ETS 2016 |
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Land/Territorium | Nederländerna |
Ort | Amsterdam |
Period | 2016/05/23 → 2016/05/26 |
Ämnesklassifikation (UKÄ)
- Elektroteknik och elektronik