Control loop timing analysis using TrueTime and Jitterbug

Anton Cervin; Karl-Erik Årzén; Dan Henriksson; M Lluesma; P Balbastre; I Ripoll; A Crespo

doi:10.1109/CACSD.2006.285481

Control loop timing analysis using TrueTime and Jitterbug

Anton Cervin, Karl-Erik Årzén, Dan Henriksson, M Lluesma, P Balbastre, I Ripoll, A Crespo

Institutionen för reglerteknik

Forskningsoutput: Kapitel i bok/rapport/Conference proceeding › Konferenspaper i proceeding › Peer review

Sammanfattning

A modern control system is typically implemented as a multitasking software application executing in a real-time operating system. If the computer load is high, the controller will experience delays and jitter, which in turn degrade the control performance. Arguing for an integrated design approach, the paper describes two computer tools for implementation-aware control analysis: TrueTime and Jitterbug. An example is given where the tools are used together to evaluate the performance of various control task implementations

Originalspråk	engelska
Titel på värdpublikation	2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control
Förlag	IEEE - Institute of Electrical and Electronics Engineers Inc.
Sidor	290-295
Antal sidor	6
ISBN (tryckt)	0-7803-9797-5
DOI	https://doi.org/10.1109/CACSD.2006.285481
Status	Published - 2006
Evenemang	2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control - Munich, Tyskland Varaktighet: 2006 okt. 4 → 2006 okt. 6

Konferens

Konferens	2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control
Land/Territorium	Tyskland
Ort	Munich
Period	2006/10/04 → 2006/10/06

Ämnesklassifikation (UKÄ)

Reglerteknik

Tillgång till dokument

10.1109/CACSD.2006.285481

Citera det här

Cervin, A., Årzén, K.-E., Henriksson, D., Lluesma, M., Balbastre, P., Ripoll, I., & Crespo, A. (2006). Control loop timing analysis using TrueTime and Jitterbug. I 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control (s. 290-295). IEEE - Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CACSD.2006.285481

Cervin, Anton ; Årzén, Karl-Erik ; Henriksson, Dan et al. / Control loop timing analysis using TrueTime and Jitterbug. 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control. IEEE - Institute of Electrical and Electronics Engineers Inc., 2006. s. 290-295

@inproceedings{503628e76b57491c8f9c174d244c4a2e,

title = "Control loop timing analysis using TrueTime and Jitterbug",

abstract = "A modern control system is typically implemented as a multitasking software application executing in a real-time operating system. If the computer load is high, the controller will experience delays and jitter, which in turn degrade the control performance. Arguing for an integrated design approach, the paper describes two computer tools for implementation-aware control analysis: TrueTime and Jitterbug. An example is given where the tools are used together to evaluate the performance of various control task implementations",

keywords = "real-time operating system, multitasking software, Jitterbug, control loop timing analysis, TrueTime, integrated design",

author = "Anton Cervin and Karl-Erik {\AA}rz{\'e}n and Dan Henriksson and M Lluesma and P Balbastre and I Ripoll and A Crespo",

year = "2006",

doi = "10.1109/CACSD.2006.285481",

language = "English",

isbn = "0-7803-9797-5",

pages = "290--295",

booktitle = "2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control ; Conference date: 04-10-2006 Through 06-10-2006",

}

Cervin, A , Årzén, K-E, Henriksson, D, Lluesma, M, Balbastre, P, Ripoll, I & Crespo, A 2006, Control loop timing analysis using TrueTime and Jitterbug. i 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control. IEEE - Institute of Electrical and Electronics Engineers Inc., s. 290-295, 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control, Munich, Tyskland, 2006/10/04. https://doi.org/10.1109/CACSD.2006.285481

Control loop timing analysis using TrueTime and Jitterbug. / Cervin, Anton ; Årzén, Karl-Erik; Henriksson, Dan et al.
2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control. IEEE - Institute of Electrical and Electronics Engineers Inc., 2006. s. 290-295.

Forskningsoutput: Kapitel i bok/rapport/Conference proceeding › Konferenspaper i proceeding › Peer review

TY - GEN

T1 - Control loop timing analysis using TrueTime and Jitterbug

AU - Cervin, Anton

AU - Årzén, Karl-Erik

AU - Henriksson, Dan

AU - Lluesma, M

AU - Balbastre, P

AU - Ripoll, I

AU - Crespo, A

PY - 2006

Y1 - 2006

N2 - A modern control system is typically implemented as a multitasking software application executing in a real-time operating system. If the computer load is high, the controller will experience delays and jitter, which in turn degrade the control performance. Arguing for an integrated design approach, the paper describes two computer tools for implementation-aware control analysis: TrueTime and Jitterbug. An example is given where the tools are used together to evaluate the performance of various control task implementations

AB - A modern control system is typically implemented as a multitasking software application executing in a real-time operating system. If the computer load is high, the controller will experience delays and jitter, which in turn degrade the control performance. Arguing for an integrated design approach, the paper describes two computer tools for implementation-aware control analysis: TrueTime and Jitterbug. An example is given where the tools are used together to evaluate the performance of various control task implementations

KW - real-time operating system

KW - multitasking software

KW - Jitterbug

KW - control loop timing analysis

KW - TrueTime

KW - integrated design

U2 - 10.1109/CACSD.2006.285481

DO - 10.1109/CACSD.2006.285481

M3 - Paper in conference proceeding

SN - 0-7803-9797-5

SP - 290

EP - 295

BT - 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control

Y2 - 4 October 2006 through 6 October 2006

ER -

Cervin A , Årzén KE, Henriksson D, Lluesma M, Balbastre P, Ripoll I et al. Control loop timing analysis using TrueTime and Jitterbug. I 2006 IEEE Conference on Computer Aided Control System Design, 2006 IEEE International Conference on Control Applications, 2006 IEEE International Symposium on Intelligent Control. IEEE - Institute of Electrical and Electronics Engineers Inc. 2006. s. 290-295 doi: 10.1109/CACSD.2006.285481

Control loop timing analysis using TrueTime and Jitterbug

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Ämnesklassifikation (UKÄ)

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