Energy Efficient SQRD Processor for LTE-A using a Group-sort Update Scheme

Chenxin Zhang; Hemanth Prabhu; Liang Liu; Ove Edfors; Viktor Öwall

doi:10.1109/ISCAS.2014.6865098

Energy Efficient SQRD Processor for LTE-A using a Group-sort Update Scheme

Chenxin Zhang, Hemanth Prabhu, Liang Liu, Ove Edfors, Viktor Öwall

Forskningsoutput: Kapitel i bok/rapport/Conference proceeding › Konferenspaper i proceeding › Peer review

153 Nedladdningar (Pure)

Sammanfattning

This paper presents an energy-efficient sorted QR decomposition (SQRD) processor for 3GPP LTE-Advanced (LTE-A) systems. The processor adopts a hybrid decomposition scheme to reduce computational complexity and provides a wide-range of performance complexity trade-offs. Based on the energy distribution of spatial channels, it switches between the brute-force SQRD and a low-complexity group-sort QR-update strategy, which is proposed in this work to effectively utilize the LTE-A pilot pattern. As a proof of concept, a run-time reconfigurable vector processor is developed to efficiently implement this adaptive-switching QR decomposition algorithm. In a 65nm CMOS technology, the proposed SQRD processor occupies 0.71 mm2 core area and has a throughput of up to 100MQRD/s. Compared to the brute-force approach, an energy reduction of 5~33% is achieved.

Originalspråk	engelska
Titel på värdpublikation	[Host publication title missing]
Förlag	IEEE - Institute of Electrical and Electronics Engineers Inc.
Sidor	193-196
Antal sidor	4
ISBN (tryckt)	978-1-4799-3431-7
DOI	https://doi.org/10.1109/ISCAS.2014.6865098
Status	Published - 2014
Evenemang	IEEE International Symposium on Circuits and Systems (ISCAS), 2014 - Melbourne, Austrailia, Melbourne, Australien Varaktighet: 2014 juni 1 → 2014 juni 5

Publikationsserier

Namn
ISSN (tryckt)	0271-4310
ISSN (elektroniskt)	2158-1525

Konferens

Konferens	IEEE International Symposium on Circuits and Systems (ISCAS), 2014
Land/Territorium	Australien
Ort	Melbourne
Period	2014/06/01 → 2014/06/05

Ämnesklassifikation (UKÄ)

Elektroteknik och elektronik

Tillgång till dokument

10.1109/ISCAS.2014.6865098

SQRD_ISCAS2014

1 Doktorsavhandling (sammanläggning)

Hardware Implementation of Baseband Processing for Massive MIMO
Prabhu, H., 2017 mars 7, The Department of Electrical and Information Technology. 168 s.
Forskningsoutput: Avhandling › Doktorsavhandling (sammanläggning)

Öppen tillgång
Fil

1 Avslutade

HiPEC: High Performance Embedded Computing
Gruian, F., Kuchcinski, K., Janneck, J., Arslan, M. A., Mirza, U. M., Zhang, C., Cedersjö, G., Prabhu, H., Liu, L., Zhu, M., Liu, Y., Edfors, O. & Öwall, V.
Stiftelsen för Strategisk Forskning, SSF
2011/01/01 → 2015/12/31
Projekt: Forskning

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@inproceedings{92c2b6946ca947859afcdb2302603dd3,

title = "Energy Efficient SQRD Processor for LTE-A using a Group-sort Update Scheme",

abstract = "This paper presents an energy-efficient sorted QR decomposition (SQRD) processor for 3GPP LTE-Advanced (LTE-A) systems. The processor adopts a hybrid decomposition scheme to reduce computational complexity and provides a wide-range of performance complexity trade-offs. Based on the energy distribution of spatial channels, it switches between the brute-force SQRD and a low-complexity group-sort QR-update strategy, which is proposed in this work to effectively utilize the LTE-A pilot pattern. As a proof of concept, a run-time reconfigurable vector processor is developed to efficiently implement this adaptive-switching QR decomposition algorithm. In a 65nm CMOS technology, the proposed SQRD processor occupies 0.71 mm2 core area and has a throughput of up to 100MQRD/s. Compared to the brute-force approach, an energy reduction of 5~33% is achieved.",

keywords = "QR decomposition, Sorted QRD, LTE-A, MIMO, Energy",

author = "Chenxin Zhang and Hemanth Prabhu and Liang Liu and Ove Edfors and Viktor {\"O}wall",

year = "2014",

doi = "10.1109/ISCAS.2014.6865098",

language = "English",

isbn = "978-1-4799-3431-7",

publisher = "IEEE - Institute of Electrical and Electronics Engineers Inc.",

pages = "193--196",

booktitle = "[Host publication title missing]",

address = "United States",

note = "IEEE International Symposium on Circuits and Systems (ISCAS), 2014 ; Conference date: 01-06-2014 Through 05-06-2014",

}

Zhang, C, Prabhu, H, Liu, L , Edfors, O & Öwall, V 2014, Energy Efficient SQRD Processor for LTE-A using a Group-sort Update Scheme. i [Host publication title missing]. IEEE - Institute of Electrical and Electronics Engineers Inc., s. 193-196, IEEE International Symposium on Circuits and Systems (ISCAS), 2014, Melbourne, Australien, 2014/06/01. https://doi.org/10.1109/ISCAS.2014.6865098

TY - GEN

T1 - Energy Efficient SQRD Processor for LTE-A using a Group-sort Update Scheme

AU - Zhang, Chenxin

AU - Prabhu, Hemanth

AU - Liu, Liang

AU - Edfors, Ove

AU - Öwall, Viktor

PY - 2014

Y1 - 2014

N2 - This paper presents an energy-efficient sorted QR decomposition (SQRD) processor for 3GPP LTE-Advanced (LTE-A) systems. The processor adopts a hybrid decomposition scheme to reduce computational complexity and provides a wide-range of performance complexity trade-offs. Based on the energy distribution of spatial channels, it switches between the brute-force SQRD and a low-complexity group-sort QR-update strategy, which is proposed in this work to effectively utilize the LTE-A pilot pattern. As a proof of concept, a run-time reconfigurable vector processor is developed to efficiently implement this adaptive-switching QR decomposition algorithm. In a 65nm CMOS technology, the proposed SQRD processor occupies 0.71 mm2 core area and has a throughput of up to 100MQRD/s. Compared to the brute-force approach, an energy reduction of 5~33% is achieved.

AB - This paper presents an energy-efficient sorted QR decomposition (SQRD) processor for 3GPP LTE-Advanced (LTE-A) systems. The processor adopts a hybrid decomposition scheme to reduce computational complexity and provides a wide-range of performance complexity trade-offs. Based on the energy distribution of spatial channels, it switches between the brute-force SQRD and a low-complexity group-sort QR-update strategy, which is proposed in this work to effectively utilize the LTE-A pilot pattern. As a proof of concept, a run-time reconfigurable vector processor is developed to efficiently implement this adaptive-switching QR decomposition algorithm. In a 65nm CMOS technology, the proposed SQRD processor occupies 0.71 mm2 core area and has a throughput of up to 100MQRD/s. Compared to the brute-force approach, an energy reduction of 5~33% is achieved.

KW - QR decomposition

KW - Sorted QRD

KW - LTE-A

KW - MIMO

KW - Energy

U2 - 10.1109/ISCAS.2014.6865098

DO - 10.1109/ISCAS.2014.6865098

M3 - Paper in conference proceeding

SN - 978-1-4799-3431-7

SP - 193

EP - 196

BT - [Host publication title missing]

PB - IEEE - Institute of Electrical and Electronics Engineers Inc.

T2 - IEEE International Symposium on Circuits and Systems (ISCAS), 2014

Y2 - 1 June 2014 through 5 June 2014

ER -

Energy Efficient SQRD Processor for LTE-A using a Group-sort Update Scheme

Sammanfattning

Publikationsserier

Konferens

Ämnesklassifikation (UKÄ)

Tillgång till dokument

Fingeravtryck

Forskningsoutput

Hardware Implementation of Baseband Processing for Massive MIMO

Projekt

HiPEC: High Performance Embedded Computing

Citera det här