High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon

Saketh, Ram Mamidala, Karl-Magnus Persson, Austin Irish, Adam Jönsson, Rainer Timm, Lars-Erik Wernersson

Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskriftPeer review

1 Citering (SciVal)

Sammanfattning

In-memory computing can be used to overcome the von Neumann bottleneck—the need to shuffle data between separate memory and computational units—and help improve computing performance. Co-integrated vertical transistor selectors (1T) and resistive memory elements (1R) in a 1T1R configuration offer advantages of scalability, speed and energy efficiency in current mass storage applications, and such 1T1R cells could also be potentially used for in-memory computation architectures. Here we show that a vertical transistor and resistive memory can be integrated onto a single vertical indium arsenide nanowire on silicon. The approach relies on an interface between the III–V semiconductor nanowire and a high-κ dielectric (hafnium oxide), which provides an oxide layer that can operate either as a vertical transistor selector or a high-performance resistive memory. The resulting 1T1R cells allow Boolean logic operations to be implemented in a single vertical nanowire with a minimal area footprint
Originalspråkengelska
Sidor (från-till)914
Antal sidor920
TidskriftNature Electronics
DOI
StatusPublished - 2021 dec 21

Ämnesklassifikation (UKÄ)

  • Den kondenserade materiens fysik
  • Nanoteknik

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