Portable digital clock generator for digital signal processing applications

Thomas Olsson, Peter Nilsson

Forskningsoutput: TidskriftsbidragArtikel i vetenskaplig tidskriftPeer review

7 Citeringar (SciVal)

Sammanfattning

A fully integrated clock generator with behaviour similar to a PLL is proposed. A free-running ring oscillator is used as internal clock and the output clock is generated using two counters. The clock generator is described in synthesisable VHDL-code and can therefore easily be made from standard cells found in any commercial standard CMOS cell library.
Originalspråkengelska
Sidor (från-till)1372-1374
TidskriftElectronics Letters
Volym39
Utgåva19
DOI
StatusPublished - 2003

Ämnesklassifikation (UKÄ)

  • Elektroteknik och elektronik

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